A 44-GHz High IP3 InP-HBT amplifier with practical current reuse biasing
Journal
IEEE Transactions on Microwave Theory and Techniques
Journal Volume
46
Journal Issue
12 PART 2
Pages
2541-2552
Date Issued
1998
Author(s)
Kobayashi, K.W.
Nishimoto, M.
Tran, L.T.
Wang, H.
Cowles, J.C.
Block, T.R.
Elliott, J.H.
Allen, B.R.
Oki, A.K.
Streit, D.C.
Abstract
This paper will discuss the practical design of an InP-based heterojunction bipolar transistor (HBT) Q-band high IP3 monolithic microwave integrated circuit (MMIC) amplifier. The amplifier features a novel "double-balanced" design approach that incorporates a practical "current reuse" biasing scheme. The current reuse biasing results in a 40% reduction in current consumption through a standard 5-V supply and simplifies the MMIC's system integration while the double-balanced design produces wide-band IP3, gain, and excellent out-of-band return loss performance required for practical applications. The three-stage MMIC amplifier achieves 15.4 dB of gain, 28.3 dBm of IP3, and a P/sub sat/ of 16.2 dBm at 44 GHz. An output-stage IP3/P/sub dc/ ratio linearity-figure-of-merit of 5.3 is obtained and is believed to be among the best reported for an InP-HBT amplifier operating at Q-band frequencies. The IP3 performance was optimized using load-pull simulations based on a custom HBT IP3 model, Different device cell configurations such as the common-emitter, common-base, and cascode were also considered. The common emitter amplifier results of this paper demonstrate the promising linearity performance of InP-HBT's and its practical bias and integration capability which is attractive for Q-band receiver applications.
SDGs
Type
journal article