A 20mW Serializing Transmitter with 2.5:1 Multiplexers in 40nm Technology
Date Issued
2015
Date
2015
Author(s)
Lin, Bo-Jing
Abstract
At the end of 2007 year, IEEE P802.3ba is generated officially. It defines the specification of 40 GbE and 100 GbE. The purpose is to extend the operation speed of the IEEE 802.3 agreement to 40 Gbps and 100 Gbps, and at the same time it also accords the current agreement and the demand of transmission distance. At the definition of IEEE P802.3ba 100GbE, the 100GbE is used four channels of 25 Gbps output with wavelength division multiplexing to achieve the purpose of high speed transmission. At communication transmission, because the cost of transmission line channel is very expensive, we usually hope to transmit higher frequency data in single channel. Therefore, it is necessary to do data serial circuit to reduce the cost of channel. At the 100GbE transmitter system, it needs to transfer ten channels of 10Gb/s to four channels of 25Gbps at the interface. Because it didn’t exist a fractional multiplexer, we need convert down frequency of ten channels 10Gbps and convert up to four channels 25Gbps. For example, we use 1:2 DEMUX (demultiplexer) to convert down ten channels of 10Gb/s to twenty channels of 5Gb/s, and then we use 5:1 MUX to convert up twenty channels of 5Gbps to four channels of 25Gbps. The process is quite complicated and wasting the device area. The thesis is a serial transmitter with 2.5 to 1 multiplexer. We don’t need to convert data frequency up and down, and it would reduce device area and power consumption. Due to use the architecture of fractional multiplexer, we can just use the single frequency of clock to simply clock generator. The transmitter is used 40 nm technology. The transmitter is implemented to transfer two channels of 25Gbps. The transmitter only dissipates 25 mW at VDD 0.9V.
Subjects
serial transmitter
fractional multiplexer
Type
thesis