CMOS Phase-Locked Loop with Integrated MEMS Resonator
Date Issued
2010
Date
2010
Author(s)
Chen, Di-Yun
Abstract
At first, we describe the footprint of MEMS resonator, started from a comb-drive resonator, as time gone, now it applied a reference oscillator in frequency synthesizer through SOP. We used TSMC 0.18um 1P6M process to design square-array resonator, and CIC MEMS post-process releases the structure. To reduce anchor loss of the structure, our unit resonator decreases anchors from 4 to 2 and mode shape choices Lame mode. CMOS TIA is placed between square-array resonator and network analyzer to amplify motional signal, and then motional behavior of square-array resonator modeled as series resonant lump element. The Q of square-array resonator measured up to 66, more better than on chip inductor. The MEMS oscillator we use sustaining amplifier and resonator, likes ring oscillator topology, to meet Barkhausen Criterion at resonant frequency. MEMS oscillator operates on 99-113 MHz, its phase noise is -133.8 dBc/Hz at 1 MHz offset, and the power consumption is 9.3 mW. In loop divider, a adjustable pulse width unit is applied to simplify traditional pulse swallow counter, the new one we called pseudo-pulse swallow counter.
The frequency of the PLL focuses on ISM 2.4GHz band, there have many wireless applications such as WLAN, Bluetooth and Zigbee. In order to meet the spacing of carrier, 20 MHz in IEEE 802.11b/g, a prescaler placed between MEMS oscillator and PFD, integer-N PLL chosen as our architecture. We specify loop BW and the phase noise of VCO through ADS. In VCO, we use CMOS type cross-coupled pair to compensate inductor’s loss, makes easy to oscillate. NMOS varactors and MIM capacitors are used to fine tune the resonant tank in VCO, makes sure it working on 2400-2480 MHz, the phase noise is close to -120 dBc/Hz at 1 MHz offset, 8.82 mW is the power consumption. At last, chip area that includes MEMS resonator is about 1.76 mm2, total power consumption is 27.2 mW without VCO buffer.
Subjects
MEMS Resonator
PLL
Type
thesis
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