A Virtual Timing Device for Program Performance Analysis
Resource
2010 IEEE 10th International Conference on Computer and Information Technology (CIT), 2255-2260
Journal
2010 10th IEEE International Conference on Computer and Information Technology
Pages
2255-2260
Date Issued
2010
Date
2010
Author(s)
Abstract
Functional virtual platforms have been popularly used to support system development without needing the actual hardware. While the emulation process is fast enough to model the behaviors of complex systems, performance assessment cannot be done accurately due to the lack of timing models for the simulated systems. To tackle the problem, we proposed a virtual timing device (VTD) for a functional virtual platform to advance simulated clock time based on the hardware/software events observed during the emulation process. As a case study, we implemented the VTD in QEMU, an open-source virtual platform, with a variety of timing algorithms offering trade-offs between the accuracy and speed of timing estimation. With a fast, but less accurate timing algorithm, quick performance analysis can be done on QEMU at approximately 67 million instruction per second and reported execution time for the MiBench with an average of 15.7% error. Highly accurate performance profiles can be obtained by elaborating the timing model, e.g. with the addition of cache simulation, at the cost of simulation speed.
Type
conference paper
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