Crosstalk- and Performance-Driven Multilevel Full-Chip Routing
Resource
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 24, NO. 6, JUNE 2005 869
Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Journal Volume
VOL. 24
Journal Issue
NO. 6
Pages
-
Date Issued
2005-06
Date
2005-06
Author(s)
DOI
246246/200611150121531
Abstract
In this paper, we propose a novel framework for
fast multilevel routing considering crosstalk and performance
optimization. To handle the crosstalk minimization problem,
we incorporate an intermediate stage of layer/track assignment
into the multilevel routing framework. For performance-driven
routing, we propose a novel minimum-radius minimum-cost
spanning tree heuristic for global routing. Compared with the
state-of-the-art multilevel routing with the routability mode, the
experimental results show that our router achieved a 6.7X runtime
speedup, reduced the respective maximum and average crosstalk
(coupling length) by about 30% and 24%, reduced the respective
maximum and average delay by about 15% and 5%. Compared
with the timing-driven mode, the experimental results show that
our router still achieved a 5.9X runtime speedup, reduced the
respective maximum and average crosstalk by about 35% and
23%, reduced the respective maximum and average delay by
about 7% and 10% in comparable routability, and resulted in
fewer failed nets.
Subjects
Detailed routing
global routing
layout
noise optimization
physical design
routing
timing optimization
Publisher
Taipei:National Taiwan University Dept Chem Engn
Type
journal article
File(s)![Thumbnail Image]()
Loading...
Name
3182.pdf
Size
1.05 MB
Format
Adobe PDF
Checksum
(MD5):631f01970ade54fd7b84d2b0ff4abbe8