A Waveform-Based Gatelevel Timing Simulator (BTS) for MOS VLSI Circuits with Considerations of Effects of the Internal Charges

Resource

Journal of the Chinese Institute of Engineers, v.18 n.2

Journal

Journal of the Chinese Institute of Engineers

Journal Volume

v.18 n.2

Pages

-

Date Issued

1995-05

Date

1995-05

Author(s)

Feng, Wu-Shiung

URI

Type

journal article