A 90-nm CMOS multi-standard GNSS receiver front-end
Journal
IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems
Pages
53-55
Date Issued
2014
Author(s)
Cheng, C.-W.
Abstract
A receiver architecture aiming to receive the L1-band multi-standard Global Navigation Satellite System signals simultaneously is described in this paper. In the proposed receiver, the GPS/Galileo and GLONASS signals are treated as the unwanted image signals for each other, and rejected for the respective down-conversion outputs. The receiver was implemented in TSMC 90-nm CMOS process and achieves more than 20 dB image reject ratio. Without an additional receiver chain, this architecture provides the benefits of low cost and power consumption. The total power consumption of the receiver frontend is 15.79 mW with a 1-V power supply, and the die area is 1.536 mm 2 .
SDGs
Type
conference paper