10Gbps線速率八埠可擴充交換機之硬體實作
Implementation of Scalable 8-Port NTU-V Switch with 10Gbps Line Rate
Date Issued
2007
Date
2007
Author(s)
Wu, Bo-Yi
DOI
en-US
Abstract
In this thesis, we propose and implement a novel high speed switch named NTU-V switch which is based on multi-plane cross-bar switch fabric. This switch has low complexity and the ability to handle variable length packets asynchronously. In addition, our switch will also support the multicast. The concept of modular design is embedded into the architecture of NTU-V Switch. Therefore NTU-V Switch has great scalability in port count and line-rate. Simulation results show that this switching architecture can eliminate head-of-line blocking (HOL blocking) effect. This switch design can emulate the performance of output queue (OQ) switch without complicated contention resolution algorithm and arbiter.
NTU-V Switch is composed of preprocessors, sequencers, switch planes, and memory management units. Each component has the ability of self-routing. We introduce the architecture from the point of hardware design. Moreover, we use the 0.13 um cell based design flow to implement an 8x8 NTU-V Switch prototype with line rate at 10Gbps. The prototype may be used as the building block of a large switching system, e.g., Terabit Switch. Our design flow includes behavior level coding (Verilog), logic synthesis (Design Compiler), and place and route (Astro). It shows that the switch has low delay and almost 100% throughput under uniform traffic condition.
Subjects
交換機
預先處理器
時序器
交換平面
記憶體管理單元
次交換機
switch
preprocessor
sequencer
switch plane
memory management unit
sub-switch
Type
thesis
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