Design of Static Synchronous Compensators Using the Sequence Unbalance Algorithm
Date Issued
2004
Date
2004
Author(s)
Li, Cheng-Tao
DOI
zh-TW
Abstract
Sensitive equipments used by high technology industries require highly quality power supplies. Typical voltage sages and unbalances caused by ground faults in the power system often interrupt the operation of these sensitive equipments.
A sequence unbalance algorithm will be proposed to design of a static synchronous compensator (STATCOM) which comprises a three- phase voltage-sourced Pulse Width Modulation (PWM) inverter with a dc capacitor. The control kernel of the STATCOM is implemented by a PC- based digital system with Advanced PCL-1800 data acquisition boards. From results of simulations and experiments, it is found that voltage un- balance can be effectively reduced by the proposed STATCOM.
Subjects
補償器
反流器
無效必v
不平衡
reactive power
unbalance
inverter
compensator
Type
thesis
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