Self I/Q Mismatch Calibration Algorithm and FPGA Prototype for WLAN OFDM Baseband Transceiver
Date Issued
2005
Date
2005
Author(s)
Hsu, Chia-Hung
DOI
en-US
Abstract
Based on the single tone power evaluation (STPE), a self-calibration algorithm of I/Q mismatch is proposed for the IEEE 802.11a WLAN systems. The self-calibration algorithm is performed by the digital baseband at transceiver start-up to measure the signal power of the single tone signal, which is located at the double frequency band at the receiver. Furthermore, the residual I/Q mismatch is tracked during the physical data transmission. Therefore, the design requirements of the RF front-end for the WLAN OFDM transceiver are alleviated. According to the proposed algorithm, the residual signal-to-noise ratio (SNR) degradation is totally less than $0.5$-dB with $pm5 \%$ gain mismatch ($Delta G$) and $pm5^circ$ phase mismatch ($Delta heta$) in the transmitter and receiver respectively, and carrier frequency offset (CFO $=pm232$kHz).
The system simulation of the IEEE 802.11a WLAN baseband transceiver is modeled by C++. Furthermore, it consists of 2-phase, floating and fixed point. The hardware-like fixed-point simulation, which considers the finite word length effect, is used to develop the Verilog RTL code. Besides, the Simplify Pro 7.3 and QuartusII 3.0 are used to synthesis and place and route of the Verilog RTL respectively. Moreover, the prototype of the IEEE 802.11a WLAN baseband transceiver is realized by Altera Stratix EP1S80 DSP development board with about 32000 logic elements at 40MHz. Finally, the system evaluations are measured by Tektronix TLA715 pattern generator and logic analyzer.
Subjects
無線區域網路
實虛部不對稱
I/Q Mismatch
Calibration
FPGA
OFDM
Type
thesis
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