A 1 v phase locked loop with leakage compensation in 0.13 μm CMOS technology
Journal
IEICE Transactions on Electronics
Journal Volume
E89-C
Journal Issue
3
Pages
295-299
Date Issued
2006-03
Author(s)
Chi-Nan Chuang
Abstract
In deep sub-micrometer CMOS process, owing to the thin gate oxide and small subthreshold voltage, the leakage current becomes more and more serious. The leakage current has made the impact on phase-locked loops (PLLs). In this paper, the compensation circuits are presented to reduce the leakage current on the charge pump circuit and the MOS capacitor as the loop filter. The proposed circuit has been fabricated in 0.13-μm CMOS process. The power consumption is 3 mW and the die area is 0.27 x 0.3 mm 2 .
SDGs
Type
journal article