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College of Electrical Engineering and Computer Science / 電機資訊學院
Computer Science and Information Engineering / 資訊工程學系
Improving GPGPU Performance via Cache Locality Aware Thread Block Scheduling
Details
Improving GPGPU Performance via Cache Locality Aware Thread Block Scheduling
Journal
Ieee Computer Architecture Letters
Journal Volume
16
Journal Issue
2
Pages
127-131
Date Issued
2017
Author(s)
Chen, Li-Jhan
Cheng, Hsiang-Yun
Wang, Po-Han
CHIA-LIN YANG
DOI
10.1109/LCA.2017.2693371
URI
https://scholars.lib.ntu.edu.tw/handle/123456789/487741
Type
journal article