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  4. A CMOS low dropout regulator with dynamic zero compensation
 
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A CMOS low dropout regulator with dynamic zero compensation

Journal
Electronics Letters
Journal Volume
43
Journal Issue
14
Pages
751-752
Date Issued
2007-07
Author(s)
Chein-Lung Chen
Wei-Jen Huang
SHEN-IUAN LIU  
DOI
10.1049/el:20071063
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/333720
https://www.scopus.com/inward/record.uri?eid=2-s2.0-34547621250&doi=10.1049%2fel%3a20071063&partnerID=40&md5=2f3388372f2c0fe6882a4a395b9c35e2
Abstract
The output capacitor and its equivalent series resistance (ESR) often limit the stability of a conventional low dropout regulator (LDR). A CMOS LDR with dynamic zero compensation is presented to tolerate the wide range of the output capacitor and the ESR. The stability constraints for the output capacitor with the ESR are derived. The measured LDR is stable for the output capacitor 2nF-47uF with ESR of 0.1-50Ω. The maximum quiescent current of this LDR with a bandgap reference is 43.2uA and its maximum output current is 150mA for the output voltage of 1.8V. © The Institution of Engineering and Technology 2007.
Other Subjects
Capacitors; CMOS integrated circuits; Electric resistance; Energy gap; Dynamic zero compensation; Equivalent series resistance (ESR); Low dropout regulator (LDR); Stability constraints; Electric current regulators
Type
journal article

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