Injection-locked Frequency Sixtuplers in 90nm CMOS by Using the Push-Push Doubler

This paper designs two single-stage <italic>LC</italic>-tank injection-locked frequency sixtuplers (ILFSs) fabricated in a 90 nm CMOS process and it describes the circuit design, operation principle, and measurement results of the ILFSs. The ILFS circuit with a differential input and single-phase output is made of a first-harmonic injection-locked oscillator (ILO), a frequency tripler, and a push-push doubler. The first ILFS uses an octagonal inductor. For a supply voltage of 0.4 V, the free-running frequency is around 41.52 GHz, DC power consumption is 9.03 mW at the incident power of 0 dBm, and the output locking range at 0 dBm input power is 10.21 %. The second ILFS uses an 8-shaped inductor for low electromagnetic (EM) noise generation. The free-running frequency is around 37.2 GHz, DC power consumption is 7.72 mW at the incident power of 0 dBm, and the output locking range at 0 dBm input power is 17.4 %. The two chips have the same area, 0.7 x 0.7 mm2. This paper also provides a further analysis and comparison of the RF performance of on-chip inductors designed. Simulation shows the substrate noise coupling and distance noise coupling between victim and aggressor, the 8-shaped inductor exhibits a significant reduction in coupling. By the measurement results, it is evident that the performance of the 8-shaped inductor ILFS is superior to that of the octagonal inductor ILFS.