A Detailed Placement Algorithm for Large-Scale VLSI Circuits
Date Issued
2006
Date
2006
Author(s)
Hsu, Tien-Chang
DOI
en-US
Abstract
A modern circuit placement algorithm consists of three steps: global placement, legalization, and detailed placement. Global placement finds rough positions of the circuit blocks, legalization removes the overlaps, and detailed placement refines the result. Modern high-performance IC designs integrate millions of blocks in a single chip. Traditional detailed placement methods consider only local cells and thus cannot handle modern large-scale designs well. It is therefore desirable to develop a better detailed placement algorithm with a more global view. Most detailed placement algorithms focus on the wirelength reduction, but the density control in the placement step becomes more important due to the increasing white space in modern designs for further performance optimization. We present a detailed placement algorithm that can minimize the wirelength and preserve the density controlled by the global placement. We adopt three major techniques in our detailed placement algorithm: (1) a cell matching technique to rearrange a group of cells simultaneously, (2) a window sweeping method to enhance the window-based local refinement by perturbing the window size and sweep direction, and (3) a cell sliding technique to gradually slide cells out of density overflow regions. Experimental results show that our algorithm achieves high-quality placement results. For the new cost metric which considers the wirelength and density constraints, our algorithm is 4.9% and 6.7% better than the state-of-the-art results from the APlace 2.0 and FastPlace 2.0, respectively. Our resulting HPWL is still 0.3% and 0.7% shorter than the above detailed placers. The results show that our algorithm can preserve the density controlled by the global placement and our wirelength improvement is still quite competitive with other state-of-the-art detailed placers.
Subjects
擺置
細部擺置
placement
detailed placement
Type
thesis
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