Design and Implementation of an Oversampling Delta-Sigma Modulator
Date Issued
2005
Date
2005
Author(s)
Wang, Chi-Hsin
DOI
en-US
Abstract
In this Thesis, we designed and implemented an oversampling multi-bit delta-sigma modulator. Multi-bit delta-sigma modulator uses an internal DAC to provide the feedback signal. However, elements mismatch in DAC due to process variation will results in non-linear distortion and cannot be noise shaped by the delta-sigma modulation loop, this will degrade the performance of a delta-sigma modulator very much.
In order to reduce the mismatch error of DAC, many dynamic element matching (DEM) algorithms have been proposed. Compared with other algorithms, the data weighting averaging (DWA) technique is used in our design due to it has the advantage of fast error cancellation and easy circuit implementation.
We use TSMC 0.18um 1P6M process and mixed-signal design methodology for our work. The designed modulator presents a 24 kHz signal bandwidth and can be used in audio application.
Subjects
三角積分調變器
動態元件匹配
資料加權平均
Delta-Sigma Modulator
DEM
DWA
Type
thesis
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