Process improvement of p-GaN HEMTs with a u-GaN etching buffer layer inserted
Journal
Applied Physics Express
Journal Volume
15
Journal Issue
11
Date Issued
2022-11-01
Author(s)
Chang, Chih Yao
Shen, Yao Luen
Tang, Shun Wei
Wu, Tian Li
Kuo, Wei Hung
Lin, Suh Fang
Huang, Chih Fang
Abstract
In this study, a 10 nm u-GaN etching buffer layer was designed and inserted into the standard p-GaN/AlGaN/GaN high electron mobility transistor structure to improve the p-GaN etching process. The experimental result shows that the device with the u-GaN layer can avoid the over-etched issue, further improving the uniformity of the etching profile and the ON-resistance of the devices. The simulation result indicates that the drain current would slightly increase due to reduced conduction band raising when the u-GaN layer is inserted. In sum, the process uniformity can improve when the u-GaN layer is inserted and in the meantime, excellent device characteristics are maintained.
Subjects
GaN | high electron mobility transistor (HEMT) | p-GaN etching
SDGs
Type
journal article