Study on the Fabrication of CMOS Double-differential Capacitive Sensors
Date Issued
2010
Date
2010
Author(s)
Lin, Chung-Han
Abstract
The purposes of this dissertation are four-folds: 1. design the CMOS capacitive sensor with HSPICE simulation, 2. Layout the designed CMOS circuit and tape out it through TSMC company, 3. Test and compare the performances of the CMOS chip with those of original design, 4. once the incorrect performances are found, try to correct or improve the design of the CMOS circuit to ensure the performances of the CMOS chip reaching the design requirement.
The dissertation uses 0.35μm Mixed-Signal 2P4M Polycide 3.3/5Vmanufacture process of TSMC which is provided by NSC Chip Implementation Center. Also the Hspice software designed by Synopsys co. is used to simulate the designed circuit, and the Laker software designed by Springsoft co. is adopted to layout the CMOS chip.
Subjects
capacitive sensor
analog integrated circuit
folded cascode amplifier
IC design
layout
Type
thesis
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