CMOS Receiver Front-End Circuit Design for 10GBASE Ethernet System
Date Issued
2005
Date
2005
Author(s)
Li, Tsung-Ying
DOI
en-US
Abstract
The data rate of the local area network (LAN) and the wide area network (WAN) reaches 10 Gb/s since the Internet expands rapidly. Fiber has many attractive advantages over the traditional copper twisted-pairs, such as the high bandwidth and low sensitivity to interferences, etc. Therefore, the optical communication systems are widely employed to fulfill the demand for the high-speed applications. The receiver front-end of the optical communication system comprises a transimpedance amplifier (TIA) and a limiting amplifier (LA) in general. The receiver performances are dominated by the front-end circuits, so careful design is required. In last decades, most of the high-speed receiver front-end circuits are realized in III-V materials and BJT process due to their high operating frequency and low-noise characteristics. However, modern fabrication technology makes it possible to realize such high-speed circuits over CMOS process with the advantages of low cost and high integration level.
In this thesis, two front-end chips of the 10GBASE-R Ethernet receiver are presented. Both chips are fabricated in 0.18 μm 1P6M CMOS technology. For high-speed requirements, several wideband techniques are adopted in the circuit design. Firstly, a TIA with cascaded architecture is realized. According to the post-layout simulations, this TIA has 55 dBΩ transimpedance gain and 7.8 GHz bandwidth. The active area is 1.35 x 1.34 mm2 and the power dissipation is 87 mW at 1.8 V supply voltage. The second chip design is LA, which is implemented by a wideband gain cell with Cherry-Hooper architecture. The simulated gain and bandwidth of the LA are 53 dB and 600 KHz~9.8 GHz, respectively. The measured data rate achieves 10 Gb/s and satisfies the 10GBASE-R Ethernet system specifications. This chip occupies an area of 1.83 x 1.53 mm2 and the power consumption is 150 mW under 1.8 V supply voltage. All the chips are designed and verified with post-layout simulations. Testing considerations and experimental results are also presented.
Subjects
光通訊前端電路
轉阻放大器
限制放大器
Optical front-end circuit
TIA
LA
Type
thesis
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