First Demonstration of 2-floor GAA In2O3 Nanosheet FET Enabled by TiN Sacrificial Layers and Fluorine Passivation
Journal
2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
Start Page
1-3
Date Issued
2025-06-08
Author(s)
Wu, Yu-Shan
Liu, Yuan-Ming
Sung, Hsien-Ming
Ma, Rong-Wei
Gracia, Johannes
Fujiwara, Hidenari
Lu, Kuan-Wei
Abstract
The true two-floor stacked PEALD (plasma-enhanced atomic layer deposition) In2O3 gate-all-around (GAA) nanosheet (NS) FET is demonstrated for the first time by the novel metallic sacrificial layers (MSLs, TiN). MSLs connect stacked S/D and form n+ region to improve contact resistance. Channel release by SF6 can shift positively by passivating oxygen vacancy (Vo) defects. The gate stack is deposited all at once by ALD to realize the GAA structure. The process temperatures are below 300°C with the back-end-of-line (BEOL) compatibility. The two-floor GAA NSFET achieve high drive current of , and high stability of positive bias stress (PBS) with the VT shift as small as 60mV at for 1000sec. Furthermore, adding IGZO into In2O3 channels achieves a positive VT of 1.6V with of at . The stacked NS architecture enables oxide semiconductor (OS) FETs to overcome limitations due to low mobility.
SDGs
Publisher
IEEE
Type
conference paper