56Gb/s PAM4 and NRZ SerDes transceivers in 40nm CMOS
Journal
IEEE Symposium on VLSI Circuits, Digest of Technical Papers
Journal Volume
2015-August
Pages
C118-C119
Date Issued
2015
Author(s)
Abstract
This paper presents 56Gb/s PAM4 and NRZ SerDes transceivers (TRXs), designed and fabricated in advance CMOS technology. Incorporating broadband techniques, noise suppression skills, and clock extraction circuits, this work demonstrates feasibility of 56Gb/s SerDes and compares tradeoffs between the two data format.
SDGs
Type
conference paper