VLSI architecture for discrete wavelet transform based on B-spline factorization

Resource

Signal Processing Systems, 2003. SIPS 2003. IEEE Workshop on

Journal

IEEE Workshop on Signal Processing Systems, SIPS 2003

Pages

-

Date Issued

2003-08

Date

2003-08

Author(s)

Huang, Chao-Tsung

Tseng, Po-Chih

DOI

1520-6130

URI

Type

journal article

File(s)

Name

01235694.pdf

Size

320.7 KB

Format

Adobe PDF

Checksum

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