Ge(SiGe)-on-Insulator Technology and SiGe Nanostructure Epitaxial Growth
Date Issued
2006
Date
2006
Author(s)
Yu, Cheng-Yeh
DOI
en-US
Abstract
In this thesis, the layer transfer techniques using wafer bonding and hydrogen implantation (also called smart-cut) have been studied. The fabrication and characterization of Ge-on-Insulator (GOI) and SiGe-on-Insulator (SGOI) structures are investigated. The ultra-high vacuum chemical vapor deposition (UHV/CVD) system is employed to epitaxial grow the SiGe nanostructures for optical and electrical applications.
First, hetero-material bonding have been investigated and demonstrated. Cleaning process employed prior to bonding must be able to remove contaminations and result in a dipole-dipole van der Waals attraction force for a good initial contact bond. High temperature treatment could strength the chemical bonds between the two wafers. It is important to establish a single bond front that propagates outward. Bonding integrities have been checked by transmission electron microscopy (TEM), breaking method and infrared transmission imaging system.
The implanted hydrogen ions would break the chemical bonds and passivated the internal surface. A high temperature treatment would lead to the nucleation and formation of the hydrogen-induced microcracks parallel to the bonding surface. Stringing up the microcracks would cause the splitting of the host wafer. The desired layer would be transferred to the handle wafer if the bonding procedure is accomplished before splitting. The layer transfer techniques involve chemical interactions of bond breaking and internal surface passivation, as well as physical interactions of gas coalescence, pressure, and fracture.
Strained thin-films on viscous layers are beneficial to engineering the elastic relaxation by viscous flow at high temperature. However, there are two possible relaxation mechanisms to relieve the stresses: in-plane expansion and buckling of the film. The characteristics of two-dimensional buckled SiGe layers have been investigated. A special 1.5 µm PL emission was observed from the buckled state, which is different from the unbuckled materials and can be potentially used as a light source. To approach in-plane expansion, patterning the strained films on reduced area can facilitate the in-
plane expansion. The semi-empirical analysis may be useful in designing devices and to obtain the functional dependence of the phase diagram in terms of Ge content and film thickness.
GOI MIS detectors were fabricated by wafer bonding and layer transfer techniques at ~150 °C: so far, a lowest GOI process temperature that has been reported. The surface roughness of GOI structure decreases as the process temperature decreases due to the suppression of hydrogen diffusion in the Ge, resulting in a smooth cleaved surface is obtained. The responsivity increases from 3.6 mA/W to 220 mA/W as the process temperature decreases from 300 °C to 150 °C, due to the suppression of defects. Low temperature bonding is thus a promising technique to provide GOI with low defect density for future electrical and optoelectronic applications.
The UHV/CVD technique could be used to successfully grow SiGe epi-layers at a low temperature (~500-600oC). The growth chamber is evacuated by turbo molecular pumps to keep in ultra-high vacuum of ~10-9 torr. Silane (SiH4) and germane (GeH4) were used as the precursors for Si1-xGex growth. Strained Si NMOSFET devices with a ~65 % effective electron mobility enhancement have been demonstrated on epitaxial SiGe virtual substrates. Growth of multi-layer Ge quantum dots under SK growth mode is self-assembled.
Finally, a ultra thin strained Ge quantum well channel (~ 4 nm) directly grown on Si substrate is demonstrated with low defect density and high hole mobility enhancement. The quantum well Ge channel reveals a ~3.2x current enhancement and a ~3.2x mobility enhancement as compared to the bulk Si PFET.
Subjects
矽鍺技術
晶圓鍵結
鍵結檢測
膜層轉移
氫離子佈植
異質材料
皺曲矽鍺層
絕緣層覆矽鍺
絕緣層覆鍺
矽鍺虛擬基板
量子點
量子井
外加機械力
應變矽技術。
SiGe
wafer bonding
layer transfer
hydrogen implant
smart-cut
Ge-on-Insulator (GOI)
SiGe-on-Insulator (SGOI)
buckling
UHVCVD
strained-Si
quantum dot
quantum well
mechanical strain.
Type
thesis
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