VLSI design of dual-mode Viterbi/turbo decoder for 3GPP

Resource

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Journal

IEEE International Symposium on Circuits and Systems

Journal Volume

2

Date Issued

2004-05

Date

2004-05

Author(s)

Huang, Kai

Li, Fan-Min

Shen, Pei-Ling

DOI

N/A

URI

Type

conference paper

File(s)

Name

01329386.pdf

Size

317.69 KB

Format

Adobe PDF

Checksum

(MD5):4ec0233273f4dd9bd25a60bc1aafa798