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College of Electrical Engineering and Computer Science / 電機資訊學院
Electrical Engineering / 電機工程學系
Design of a high-speed bloc k interleaving/deinterleaving architecture for wireless communication applications
Details
Design of a high-speed bloc k interleaving/deinterleaving architecture for wireless communication applications
Journal
IEEE International Conference on Consumer Electronics
Date Issued
2009
Author(s)
Yu, C.
Yen, M.-H.
Hsiung, P.-A.
SAO-JIE CHEN
DOI
10.1109/ICCE.2009.5012220
URI
http://www.scopus.com/inward/record.url?eid=2-s2.0-70349286437&partnerID=MN8TOARS
http://scholars.lib.ntu.edu.tw/handle/123456789/350236
Type
conference paper
