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College of Electrical Engineering and Computer Science / 電機資訊學院
Electronics Engineering / 電子工程學研究所
A 3X-oversampling hybrid clock and data recovery circuit with programmable bandwidth
Details
A 3X-oversampling hybrid clock and data recovery circuit with programmable bandwidth
Journal
IEEE VLSI-DAT
Date Issued
2014-04
Author(s)
J-A Cheng
W-S Chang
TAI-CHENG LEE
DOI
10.1109/VLSI-DAT.2014.6834881
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/388855
SDGs
[SDGs]SDG7
Type
conference paper
