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College of Electrical Engineering and Computer Science / 電機資訊學院
Biomedical Electronics and Bioinformatics / 生醫電子與資訊學研究所
A Bipartition-Codec Architecture to Reduce Power in Pipelined Circuits
Details
A Bipartition-Codec Architecture to Reduce Power in Pipelined Circuits
Journal
1999 IEEE/ACM International Conference on Computer Aided Design
Pages
84-89
Date Issued
1999-11
Author(s)
Shanq-Jang Ruan
Rung-Ji Shang
Feipei Lai
Shyh-Jong Chen
Xian-Jun Huang
FEI-PEI LAI
DOI
10.1109/iccad.1999.810627
URI
http://scholars.lib.ntu.edu.tw/handle/123456789/352537
Type
conference paper