A 1.5 V CMOS high-speed 16-bit÷8-bit divider using the quotient-select architecture and true-single-phase bootstrapped dynamic circuit techniques suitable for low-voltage VLSI
Resource
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Journal
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Pages
-
Date Issued
1997-08
Date
1997-08
Author(s)
Yeh, C.C.
Lou, J.H.
Kuo, J.B.
DOI
N/A
Type
journal article
File(s)
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Name
00666110.pdf
Size
399 KB
Format
Adobe PDF
Checksum
(MD5):0dee618c95dbd8e06e7bf7291fc4343f