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  4. Synergistic Effects of Additive Engineering in Enhancing the Performance of Sn–Pb Perovskite Thin-Film Transistors and Derived Logic Circuits
 
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Synergistic Effects of Additive Engineering in Enhancing the Performance of Sn–Pb Perovskite Thin-Film Transistors and Derived Logic Circuits

Journal
Advanced Science
Journal Volume
13
Journal Issue
13
Start Page
e20241
ISSN
21983844
Date Issued
2026-03-03
Author(s)
Ansari, Zeeshan Alam
Kumar, Abhishek
Banerjee, Soumallya
Hanmandlu, Chintam
Thakran, Anjali
Chen, Yu-Te
Yang, Po-Yu
Li, Shenghan
Pao, Chun-Wei
Chang, Yun-Chorng
CHU-CHEN CHUEH  
Chu, Chih-Wei
DOI
10.1002/advs.202520241
URI
https://www.scopus.com/record/display.uri?eid=2-s2.0-105029343403&origin=resultslist
https://scholars.lib.ntu.edu.tw/handle/123456789/736364
Abstract
Solution-processed metal halide perovskite transistors possess intrinsic characteristics that hold promise for integration with n-type semiconductors such as fullerene (C60) in CMOS-like circuits. Yet, their performance and stability remain inferior to n-type counterparts due to inefficient in-plane charge transport and defect-induced instabilities. This study proposes a rational additive engineering strategy using 4,8-dihydrobenzo[1,2-b:4,5-b′]dithiophen-4,8-dione (BDTD) to regulate nucleation and crystallization of MA0.4FA0.6Sn0.5Pb0.5I3 films. BDTD alleviates microstrain, suppresses Sn4+-related defects, and passivates undercoordinated Sn and Pb ions, forming smoother films with enlarged grains. Compared to control devices, the optimized transistor achieves an increase by an order of magnitude in hole mobility (4.1 vs. 0.38 cm2 V−1 s−1) and a substantially improved on/off ratio (1.8 × 105 vs. 3.1 × 104). Moreover, the BDTD-treated transistors exhibit excellent reproducibility and operational stability under inert conditions without encapsulation. Furthermore, surface passivation using tetrabutylammonium hexafluorophosphate (TBAPF6) reduces interfacial traps, improving reliability and lowering the threshold voltage from 9.89 to 3.6 V. Finally, integration with an n-type C60 transistor yields a functional perovskite–C60 inverter, demonstrating strong potential for complementary logic applications. This work highlights the synergistic role of additive and interfacial engineering in overcoming intrinsic limitations of Sn-Pb perovskites, offering a viable pathway toward practical perovskite-based complementary electronics.
Subjects
additive engineering
complementary logic circuits
defect passivation
mixed Sn-Pb perovskites
thin-film transistor
Publisher
John Wiley and Sons Inc
Type
journal article

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