A K-band CMOS cascode power amplifier using optimal bias selection methodology
Journal
Asia-Pacific Microwave Conference Proceedings, APMC
Pages
793-796
Start Page
793
End Page
796
ISBN (of the container)
978-085825974-4
Date Issued
2011
Author(s)
Abstract
A fully integrated K-band power amplifier is designed and fabricated in 0.18-μm CMOS technology in this paper. The conventional cascode power amplifier benefits from high gain and output power, but the efficiency is not well discussed before. In this study, the voltage variation and the large-signal performance of cascode PA are analyzed, and the new design strategy for the optimal bias selection has been developed to enhance the efficiency of cascode PA without sacrificing other performance. The measurement results show 18-dBm output power at peak power added efficiency (PAE) of 18.9% and 16.8- dBm 1-dB compression power (P 1dB) with 15.5% of PAE under 2.7-V bias supply. The difference between the power at P 1dB and at peak PAE is reduced to 1.2 dB.
Event(s)
Asia-Pacific Microwave Conference, APMC 2011
Subjects
bias selection
cascode
CMOS
power amplifier
Type
conference paper