A V-band divide-by-four frequency divider with wide locking range and quadrature outputs
Journal
IEEE Microwave and Wireless Components Letters
Journal Volume
22
Journal Issue
2
Pages
82-84
Date Issued
2012
Author(s)
Abstract
This letter presents a V-band wide-locking range divide-by-four frequency divider implemented in 90-nm digital CMOS technology. A sub-harmonic mixer (SHM) is adopted in the regenerative divider architecture to realize the division ratio of four. The splitting supply and parallel inductive peaking techniques are applied to the mixer design to boost the conversion gain, which is the bottleneck of the divider's locking range. Operated at 1.2 V, the frequency divider consumes 15.5 mW of power and generates four-phase output signals. The measured locking range is 5.4 GHz with the input signal power smaller than 0 dBm.
SDGs
Type
journal article