Design of Multi-layer Planar Circuits and Substrate Integrated Waveguide Transition for V-band

Abstract

This thesis continues previous works of two kinds of vertical transitions between microstrip line and substrate integrated waveguide (SIW), and a vertical transition between coplanar waveguides (CPW) utilizing flip-chip method. All these structures are fabricated on low-temperature co-fired ceramic (LTCC) or RO4003 substrate. This thesis also analyzes the equivalent circuits of the transition structures.he first transition design is realized with a shorted via between the end of the microstrip line and the bottom layer of SIW. A current is induced on the via and energy is coupled to SIW. The microstrip line is on the upper layer, and the SIW is on the lower layers with vertical metal walls realized by closely spaced vias. This structure is designed at 73GHz with a 17% fractional bandwidth (FBW) and a 0.72dB insertion loss.nother transition structure is realized with a slot on the top wall of SIW, which is fed by a microstrip line ended with a quarter wave length open stub. With the magnetic current induced on the slot, the transition is achieved. The microstrip line is on the upper layer, and the SIW is on the lower layers with vertical metal walls realized by closely spaced vias. This structure is designed at 73GHz with a 38.7% FBW and 1.07dB insertion loss. Another design is also given at 60GHz with a radial stub, a 53.3% FBW and 0.65dB insertion loss can be achieved.he last transition structure is composed of two CPW sections, and is connected by flip-chip method. By cutting the corner on the ground metals of both CPW sections. The capacitance or inductance in the interconnect region can be compensated to achieve impedance matching. This structure is designed from DC to 25GHz for 10dB in-band return loss.ll of the designs are simulated by Ansoft HFSS and compared with measurements. Good agreements are also obtained.