Design of Microwave GaAs Low Noise Amplifier and Silicon-based Components for High Speed Wireless Communication Systems

This thesis contains three parts. The first part is a K-band high gain low noise amplifier in WIN 0.1-μm process for radio astronomy application. The measurement results of the low noise amplifier show the small signal gain is 29 dB from 18.5GHz to 30 GHz and the measured average noise figure is 2.1 dB around K-band. The total dc consumption is 27 mW and this satisfies the dc power limitation of cryogenic operation in the future. The second part of the thesis is a broadband frequency doubler with harmonic suppression technique in 90 nm CMOS process. The balanced cascode structure features good odd order harmonic suppression, and the fourth and higher order even harmonic is suppressed by an elliptic low-pass filter. The measured conversion loss of this frequency doubler is 8 to 11 dB from 42 to 90 GHz at 5-dBm input drive. The fundamental rejection ratio is better than 20 dBc and the fourth order harmonic rejection is better than 18 dBc. The total dc power is 20 mW, and total chip area is 0.33 mm2. The third part is a Ka-band phase shifter and variable gain amplifier. The phase shifter is a switch type phase shifter which can save dc power and relief the control circuit in phase array system. The phase shifter controls the input signal phase of theantenna, and variable gain amplifier is used to compensate the loss difference of different phase shifter operation state. The measured insertion loss of the initial design of the phase shifter is 9 lowest to 13 dB but the phase error is larger than 11.25°. Therefore two redesigned phase shifter are simulated and measured and presented in discussion. The variable gain amplifier shows peak gain of 19 dB with 6-dB gain tuning range and this can cover the phase shifter loss difference of different phase state.