Optimal module set and clock cycle selection for DSP synthesis

Resource

Circuits and Systems, 1991., IEEE International Sympoisum on

Journal

IEEE International Sympoisum on Circuits and Systems, 1991

Pages

-

Date Issued

1991-06

Date

1991-06

Author(s)

Jeng, Lih-Gwo

DOI

DOI

N/A

URI

Type

journal article

File(s)

Name

00176734.pdf

Size

363.03 KB

Format

Adobe PDF

Checksum

(MD5):a2c25c1570664be567d6ab85aa3d6a9c