Configurable NAND Flash Translation Layer
Journal
Proceedings - IEEE International Conference on Sensor Networks, Ubiquitous, and Trustworthy Computing
Journal Volume
2006 II
Pages
118-125
Date Issued
2006
Date
2006
Author(s)
Abstract
Flash memory is widely adopted in various consumer products, especially for embedded systems. With strong demands on product designs for overhead control and performance requirements, vendors must have an effective design for the mapping of logical block addresses (LBA's) and physical addresses of data over flash memory. This paper targets such an essential issue by proposing a configurable mapping method that could trade the main-memory overhead with the system performance under the best needs of vendors. A series of experiments is conducted to provide insights on different configurations of the proposed method. © 2006 IEEE.
Other Subjects
Consumer products; Embedded systems; Flash memory; Product design; Configurable mapping method; Logical block addresses (LBA); Main memory overhead; Vendors; NAND circuits
Type
conference paper
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