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Design of a Digital Controller for Multi-phase Voltage Regulator Applications
Date Issued
2009
Date
2009
Author(s)
Liu, De-Min
Abstract
A digital controller for a two-phase interleaved voltage regulator is presented in this thesis. To begin, the small-signal model is derived using state-space averaging method. Based on the small-signal model, the design of the compensator is accomplished through the pole-zero cancellation method. The control scheme is set at voltage mode, and the inductor current is sensed to achieve Gain Scheduling function. A lookup table is established so the parameters of the compensator can be adjusted for different loading conditions— so that the dynamic response can be enhanced. In addition, as long as the auto phase shedding technique is used, the operating phase number can be determined according to the loading condition, and the light load efficiency will be improved finally.he function of the designed digital controller is simulated and confirmed by using Matlab®/Simulink®.A digital controller for a 12V-to-1.2V two-phase interleaved voltage regulator is implemented using an FPGA(Field Programmable Gateway Array) board and the experimental results demonstrate the proposed controller design.
Subjects
Two-phase interleaved voltage regulator
Digital control
Gain scheduling
Phase shedding
Type
thesis
File(s)
No Thumbnail Available
Name
ntu-98-J96921008-1.pdf
Size
23.32 KB
Format
Adobe PDF
Checksum
(MD5):16b4d9538fc4e371ca93cf6ba8825353