A 4-bit, 13.5GSample/sec track-and-hold circuit
Journal
International Symposium on VLSI Design, Automation & Test
Pages
144-147
Date Issued
2007-04
Author(s)
I-Hsin Wang
Abstract
With the channel length scaled down in CMOS process technology, the clock feedthrough will degrade the performance of a high-speed track-and-hold (T/H) circuit due to the thin-oxide gate leakage and parasitic overlapping capacitance. A 13.5 GSample/sec CMOS T/H circuit with clock feedthrough and charge injection cancellation is proposed. This T/H circuit has been fabricated in 90 nm CMOS process. It achieves 4-bit resolution from 250 MHz to 5 GHz analog input signal at 13.5 GSample/sec and dissipates 89 mW from single IV supply voltage.
SDGs
Type
conference paper