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Advances in Hardware Architectures for Image and Video Coding—A Survey
Resource
Proceedings of IEEE 93 (1): 184-197
Journal
Proceedings of IEEE
Journal Volume
93
Journal Issue
1
Pages
184-197
Date Issued
2005
Date
2005
Author(s)
Tseng, Po-Chih
Chang, Yung-Chi
Huang, Yu-Wen
Fang, Hung-Chi
Huang, Chao-Tsung
Chen, Liang-Gee
Abstract
This paper provides a survey of state-of-the-art hardware architectures for image and video coding. Fundamental design issues are discussed with particular emphasis on efficient dedicated implementation.
Hardware architectures for MPEG-4 video coding and
JPEG 2000 still image coding are reviewed as design examples, and special approaches exploited to improve efficiency are identified.
Further perspectives are also presented to address the challenges of hardware architecture design for advanced image and video coding in the future.
Hardware architectures for MPEG-4 video coding and
JPEG 2000 still image coding are reviewed as design examples, and special approaches exploited to improve efficiency are identified.
Further perspectives are also presented to address the challenges of hardware architecture design for advanced image and video coding in the future.
Subjects
Hardware architecture
H.264/AVC
image coding
JPEG 2000
MPEG-4
very large scale integration (VLSI)
video coding
Type
journal article
File(s)
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Name
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Size
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Format
Adobe PDF
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(MD5):dfe899d6587baf3053f59cb41c5f7d72