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  4. Implementation of a Multiple Code-Length Polar Code Decoder Architecture
 
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Implementation of a Multiple Code-Length Polar Code Decoder Architecture

Date Issued
2014
Date
2014
Author(s)
Po, Jung-Hong
URI
http://ntur.lib.ntu.edu.tw//handle/246246/276118
Abstract
Channel coding is a technique which adds redundancy to the messages in order to increase the reliability of transmission. Many works have been devoting to construct a coding scheme that can transmit messages reliably at rates set below the channel capacity. Polar code is one such scheme that can achieve channel capacity theoretically under successive cancellation (SC) decoding. SC decoder needs to process data serially. New data generation needs to process previous information. Therefore, we can find that this decoder is a very inefficient structure. In this work, we proposed a processing element (PE) to solve the SC decoding problem. And we want to use the SC decoder symmetric structure to implement a hardware which can process information with different code lengths. Besides, there is an algorithm which uses the soft values to generate the partial sum information, which has a better performance. We also proposed a hardware structure to implement this algorithm efficiently, by modifying our SC PE. Our goal is to implement an SC polar code decoder to process multiple code-length data. We use a modified PE to increase the SC polar decoder throughput. Our proposed polar code SC decoder has a higher through-put channel code structure and a multi-code word structure. Moreover, we proposed a soft-output output polar decoding structure to improve the decoder performance. And this decoder can process data and save 1/4 clock cycles. The code lengths can be 512 and 256 bits and code rate can be 0.5 and 0.75.
Subjects
Symmetric Capacity
Bhattacharyya Parameters
Frozen Bits
Type
thesis
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ntu-103-R01943044-1.pdf

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