FACE: Fine-tuned Architecture Codesign Environment for ASIP Development
Journal
Design Automation for Embedded Systems
Journal Volume
4
Journal Issue
4
Pages
329-351
Date Issued
1999-10
Author(s)
Abstract
High-performance, reliable, and robust products with a short development schedule are general design aims. FACE was developed to achieve these goals, including the organization of a design flow, a frequency-driven information analyzer, compiler techniques (code generator and instruction optimization), and a hierarchical object design library. This paper explores the design space of a retargetable compiler and a reconfigurable hardware, which combine both software and hardware reprogrammability. The environment, FACE, we have developed allows us to quickly move the functions between software and hardware in a state of flux. Finally, it generates the application specific integrated processor (ASIP) and a compiler for the new ASIP architecture. The case study is considered which demonstrates the efficiency in ASIP design of FACE.
SDGs
Type
journal article