Dynamic bias instability of p-channel polycrystalline-silicon thin-film transistors induced by impact ionization
Journal
IEEE Electron Device Letters
Journal Volume
30
Journal Issue
4
Pages
368-370
Date Issued
2009
Author(s)
Huang, C.-F.
Sun, H.-C.
Yang, Y.-J.
Chen, Y.-T.
Ku, C.-Y.
Liu, C.W.
Hsu, Y.-J.
Shih, C.-C.
Chen, J.-S.
Abstract
The dynamic stress switching of p-channel polycrystalline-silicon (poly-Si) thin-film transistors from full depletion to accumulation bias creates the high electric field near source/drain (S/D) junctions due to the slow formation of the accumulated electrons at the SiO 2 /poly -Si interface. The high electric field causes impact ionization near the S/D, where the secondary electrons surmount the SiO 2 barrier and are trapped near the interface. The channel region near the S/D is inverted to p-type by the trapped electrons, and the effective channel length is reduced. The drain current increases with the stress time, particularly for short-channel devices.
Type
journal article