Analysis of pattern-dependent and timing-dependent failures in an experimental test chip.
Journal
Proceedings IEEE International Test Conference 1998, Washington, DC, USA, October 18-22, 1998
Pages
184-193
Date Issued
1998
Author(s)
Abstract
This paper presents the results for very detailed studies of pattern and timing-dependent failures from the 309 dies in the retest of an experimental test chip. 22 out of the 50 CUTs with pattern-dependent failures had test escapes if the test sets were reordered. Some timing-dependent failures became timing-independent combinational (TIC) defects at very low voltage. Multiple-detect single stuck fault test sets have high transition fault coverage. Most dies with TIC or non-TIC defects were close to gross failures or next to the wafer periphery.
Type
conference paper