An analysis of substrate effects on transmission-lines for millimeter-wave CMOS RFIC applications
Journal
Microwave and Optical Technology Letters
Journal Volume
50
Journal Issue
2
Pages
319-324
Date Issued
2008
Author(s)
Abstract
A set of transmission lines (TLs) for millimeter-wave (MMW) CMOS RFlC applications was implemented in a standard 0.18 μm CMOS technology and then postprocessed by CMOS-compatible inductively-coupled plasma (ICP) etching, which removed the silicon underneath the TLs completely. TL parameters such as characteristic impedance Zc, attenuation constant α, phase constant β, effective permittivity Eeff' minimum noise figure (NFmin), parallel capacitance/conductance C/G, and series inductance/resistance L/R, as a function of frequency were extracted. It was found that α, εeff' NFmin', C, and G were greatly improved after silicon removal. The state-of-the-art performances of the on-chip TLs-on-air suggest that they are very suitable for application to realize ultralow-noise MMW CMOS RFICs. Besides, the CMOS-compatible backside ICP etching technique is very promising for MMW system-on-a-chip applications. © 2007 Wiley Periodicals, Inc.
SDGs
Type
journal article