A Delay-Line-Based GFSK Demodulator for Low-IF Receivers
Journal
International Solid-State Circuit Conference (ISSCC)
Pages
88-89+589+77
Date Issued
2007-02
Author(s)
Abstract
A low-power GFSK demodulator employing a self-calibrated delay line and DSP circuits achieves an SNR of 14.9dB. Without any accurate analog circuits and oversampling clocks, the demodulator performs detection for frequency offsets up to plusmn350kHz. Fabricated in a 0.18 μm CMOS process, it occupies 0.26mm 2 and consumes 2mA from a 1.8V supply.
SDGs
Type
conference paper