A Real-Time FHD Learning-Based Super-Resolution System Without a Frame Buffer
Journal
IEEE Transactions on Circuits and Systems II: Express Briefs
Journal Volume
64
Journal Issue
12
Pages
1407-1411
Date Issued
2017
Author(s)
Abstract
This brief presents a real-time learning-based super-resolution (SR) system without a frame buffer. The system running on an Altera Stratix IV field programmable gate array can achieve output resolution of 1920 × 1080 (FHD) at 60 fps. The proposed architecture performs an anchored neighborhood regression algorithm that generates a high-resolution image from a low-resolution image input using only numbers of line buffers. This real-time system without a frame buffer makes it possible to integrate SR operation into image sensors or display drivers carrying out computational photography and display. © 2004-2012 IEEE.
Subjects
anchored neighborhood regression; FPGA; real-time; Super resolution
SDGs
Other Subjects
Color photography; Field programmable gate arrays (FPGA); Interactive computer systems; Optical resolving power; Real time systems; Signal receivers; anchored neighborhood regression; Computational photography; Learning-based super-resolution; Low resolution images; Proposed architectures; Real time; Regression algorithms; Super resolution; Learning systems
Type
journal article