Scalable and bijective cells for C-testable iterative logic array architectures

Journal

IET Circuits, Devices & Systems

Journal Volume

3

Journal Issue

4

Pages

172-181

Date Issued

2009-08

Author(s)

B. Y. Ye

P. Y. Yeh

S. Y. Kuo

I. Y. Chen

DOI

10.1049/iet-cds.2008.0296

URI

http://scholars.lib.ntu.edu.tw/handle/123456789/352021

SDGs

[SDGs]SDG9

Type

journal article