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  4. The Etching Holes Effects on Capacitive Micro-Devices
 
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The Etching Holes Effects on Capacitive Micro-Devices

Date Issued
2012
Date
2012
Author(s)
Chu, Wen-Chang
URI
http://ntur.lib.ntu.edu.tw//handle/246246/249796
Abstract
In many MEMS devices, movable suspension structure is the most important design to achieve sensing or actuating function. Etching the sacrificial layer under the microstructure is a common method to release structure. For the device which has large area, it is necessary to design a large number of etching holes to enable the etchant to etch sacrificial layer completely. However, the etching holes will result in many physical characteristics changes. For capacitive micro-devices, etching holes cause the decreasing of capacitance and induce fringe capacitance, which generated by fringe field, at the same time. As a result, estimating the capacitance of microstructures becomes much more difficult, so do the device characteristics. Therefore, how to calculate and estimate the etching holes effects becomes a very critical issue for the micro-devices with etching holes. This research aims at evaluating the fringe field capacitance caused by etching holes on microstructures, and developing empirical formulas. The general capacitance compensation term empirical formula for the fringe capacitance of etching holes is based on ANSYS simulation. By choosing appropriate parameters to curve fit on the results obtained from the simulation, the relative deviation of the empirical formula is within 5% compared with the ANSYS simulation results. To verify the empirical formula accuracy, large-scale experiment is performed in this research, and the relative deviation between the formula and experiment results is also within 5%. At the same time, the application to determine the capacitance of an electrostatic micro-beam with etching holes is demonstrated in micro-structure experiment, which agrees very well with the experimental data, and the maximum deviation is within 8%. In conclusion, this paper provides an empirical formula which can estimate the etching holes effects on capacitive micro-device. The present solution is with simple form, wide application range, high accuracy and easy to use. It is expected to provide the MEMS designers to estimate the capacitance of micro-devices with etching holes and predominate in the device characteristics.
Subjects
Parallel-plate Capacitor
Fringing Capacitance
Etching Hole
Etching Hole Effect
Micro-devices
MEMS
Type
thesis
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