Design and Implementation of CMOS Receiver Front-Ends for 60 GHz Indoor Wireless Communication
Date Issued
2007
Date
2007
Author(s)
Huang, Juin-Wei
DOI
en-US
Abstract
The need for very high data rate wireless systems has encouraged research interest on use of the 7-GHz unlicensed band around 60 GHz. Although these millimeter-wave circuit blocks are usually designed using III-V technologies because of its higher mobility and breakdown voltage, these years, they can be implemented using CMOS technologies because of the scaling of devices. However, the major challenge is at the interface between the transceiver and antenna, because bond wires usually used as the interface have high loss at 60 GHz. Fortunately, if a low-loss chip antenna on silicon can be implemented, the loss due to bond wires can be eliminated. Therefore, the integration of 60 GHz receiver and chip antenna will be investigated in the thesis.
60-GHz chip antennas on silicon are firstly studied and implemented in this research. Besides, LNA is another critical component in the receiver. Hence the issues with LNA at 60 GHz will be studied and an improved circuit topology will be introduced to resolve them. A receiver consisting of an on-chip antenna, low noise amplifier, mixer and oscillator will then be fabricated. Finally, a new transmission line structure will also be proposed. It is especially suitable to design compact silicon-based passive circuits. A 60-GHz LNA using the proposed transmission line for impedance matching is implemented. All the circuits are fabricated using 130-nm CMOS technology.
Subjects
毫米波
金氧半場效電晶體
接收機
millimeter wave
CMOS
receiver
Type
thesis
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