The Performance Evaluation of Scheduling Algorithms for Processor Cost Optimization
Date Issued
2008
Date
2008
Author(s)
Chien, Ya-Hung
Abstract
The optimization problem of processor cost in hardware/software co-synthesis is highly challenging inmbedded system designs. In this paper, we address co-synthesis issues in heterogeneous cores, communication overheads, and task dependency. In particular, different co-synthesis strategies are investigated with respect to the processor allocation, taskssignment, and task scheduling. Evaluation of various combinations of strategies is explored to derive insights for hardware/software co-synthesis.he needs of multiple cores are driven by many emerging application domains, such as video encoding/decoding, wireless communication, and interactive interface. It has become very popular for embedded systems to have multiple heterogeneous cores, where cores arenterconnected by various types of communication links. One important challenging problem confronted by manyystem designers is how to rapidly prototype application-specific embedded system architectures with integration considerations of different combinations of software and hardware, provided that various constraints on real-time performance, reliability, and cost remain satisfied. How to minimize the architecture cost and to satisfy applications'' constraints presents tremendous challenges in the optimization problem of embedded systems.
Subjects
scheduling
processor
cost
evaluation
cosynthesis
Type
thesis
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