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  4. Hardware-Software Codesign for System-On-a-Chips
 
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Hardware-Software Codesign for System-On-a-Chips

Date Issued
2002-07-31
Date
2002-07-31
Author(s)
陳少傑  
DOI
902215E002010
URI
http://ntur.lib.ntu.edu.tw//handle/246246/7872
Abstract
Currently, codesign methodologies and techniques are being proposed for the design of SOC both in academia and in industry. One of the most urgent tasks at this time is to allow a smooth transition from IC design to system design, which requires a hardware-software codesign methodology and a tool for designers to easily design their highly complex designs before the actual costly fabrication. With this goal in mind, we are developing a hardware-software (H/W-S/W) CO-design tool for multimedia system SOC. Implementing a multimedia system can be divided into two different portions: software portion and hardware portion. Due to the higher cost in developing hardware, the designer would usually prefer to implement a system mostly by a software-solution. Only the functions that have a higher performance requirement or a tight timing constraint would be implemented as hardware. In this report, we propose a system/function level hardware/software partitioning method to perform system partitioning for multimedia applications. We also use JPEG2000 coding system as an example to demonstrate how to perform design space exploration by using our methodology to obtain an optimal system partitioning that can satisfy user defined design constraints. Our partitioning method could not only be used in traditional hardware/software codesign flow, but also can be used under the integrated platform-based function-architecture codesign.
Subjects
System-On-a-Chip
Hardware-Software Partitioning
System design methodology
Publisher
臺北市:國立臺灣大學電機工程學系暨研究所
Type
report
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902215E002010.pdf

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(MD5):2979174d5376db52ed4372ac7aa46cc8

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